Prasenjit Biswas

Senior ASIC Engineer at NVIDIA

Have done Masters from Texas A and M university in Computer Engineering and from Indian Institute of Science in Computer Systems and VLSI. Now working as an Senior Formal Verification Engineer in NVIDIA @Santa Clara. Previously worked as an ASIC engineer in the GPU team of nVIDIA Graphics Inc. Prime responsibility was to do formal verification of Streaming Multiprocessor Sub-modules and floating point arithmatic data-path units of GPU. FV methodology used is Model Checking for Control Units and Sequential Equivalence Checking for Datapath Units. Have 5 years of academic reasearch experience. Main expertise is in Formal Vericiation, System level architecture, Reconfigurable computing platforms. • Interests: Design of Digital VLSI circuits Formal verification of datapath intensive modules Architectural level design & Engineering Design of Reconfigurable Platforms • FV tools: Hector, SLEC, Jasper • Other EDA tools: Xilinx ISE, Synopsys­Design Vision, SOC­Encounter, Modelsim, LT‐Spice, Electric • RTL: VHDL, Verilog HDL, System Verilog Assertions • Applications: MATLAB • Operating Systems: Linux, Microsoft Windows • Programming skills: C, C++, Assembly: 8085